R5
Product
Ryzen 5300g Firmware
15
CVEs
0
On KEV
9.1
Max CVSS
0
New 30D
Severity mix
Critical 2High 8Medium 5Low 0
Watch
Add Ryzen 5300g Firmware to your stack to get only the CVEs that touch what you run.
| CVE | CVSS | Published | Summary · affected versions |
|---|---|---|---|
| CVE-2021-46773 | 8.8 | May 9 | Insufficient input validation in ABL may enable a privileged attacker to corrupt ASP memory, potentially resulting in a loss of integrity or code execution Affected: cezannepi-fp6_1.0.0.b |
| CVE-2022-29277 | 8.8 | Nov 15 | Incorrect pointer checks within the the FwBlockServiceSmm driver can allow arbitrary RAM modifications During review of the FwBlockServiceSmm driver, certain instances of… Affected: before 05.44.30.0004 |
| CVE-2021-26386 | 7.8 | May 12 | A malicious or compromised UApp or ABL may be used by an attacker to issue a malformed system call to the Stage 2 Bootloader potentially leading to corrupt memory and code… Affected: All versions, or not specified |
| CVE-2021-26317 | 7.8 | May 12 | Failure to verify the protocol in SMM may allow an attacker to control the protocol and modify SPI flash resulting in a potential arbitrary code execution Affected: All versions, or not specified |
| CVE-2021-46794 | 7.5 | May 9 | Insufficient bounds checking in ASP (AMD Secure Processor) may allow for an out of bounds read in SMI (System Management Interface) mailbox checksum calculation triggering a data… Affected: cezannepi-fp6_1.0.0.6 |
| CVE-2021-46765 | 7.5 | May 9 | Insufficient input validation in ASP may allow an attacker with a compromised SMM to induce out-of-bounds memory reads within the ASP, potentially leading to a denial of service Affected: cezannepi-fp6_1.0.0.b; comboam4v2_pi_1.2.0.8 |
| CVE-2021-46749 | 7.5 | May 9 | Insufficient bounds checking in ASP (AMD Secure Processor) may allow for an out of bounds read in SMI (System Management Interface) mailbox checksum calculation triggering a data… Affected: cezannepi-fp6_1.0.0.8 |
| CVE-2020-12965 | 7.5 | Feb 4 | When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits potentially resulting in data… Affected: All versions, or not specified |
Showing 8
