High severity · published Sep 25, 2024
CVE-2024-45817
In x86's APIC (Advanced Programmable Interrupt Controller) architecture, error conditions are reported in a status register
7.3
CVSS
0.5%
EPSS
No
On KEV
Description
In x86's APIC (Advanced Programmable Interrupt Controller) architecture,
error conditions are reported in a status register. Furthermore, the OS
can opt to receive an interrupt when a new error occurs.
It is possible to configure the error interrupt with an illegal vector,
which generates an error when an error interrupt is raised.
This case causes Xen to recurse through vlapic_error(). The recursion
itself is bounded; errors accumulate in the the status register and only
generate an interrupt when a new status bit becomes set.
However, the lock protecting this state in Xen will try to be taken
recursively, and deadlock.
CVSS vector
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:L/A:L
Attack vector
Network
Complexity
Low
Privileges
None
User interaction
None
Confidentiality
Low
Integrity
Low
Availability
Low
Scope
Unchanged
Exploitation
Is it being used?
Exploit prediction (EPSS)0.5% · higher than 46% of CVEs
Exploited in the wildNo evidence yet
CISA KEVNot listed
Ransomware campaign useNot known
Affected products
Which versions
XE
Xen · Xen
4.5.0 and later · source: NVD
References
NVD
https://nvd.nist.gov/vuln/detail/CVE-2024-45817
CVE.org
https://www.cve.org/CVERecord?id=CVE-2024-45817
Patch
https://xenbits.xenproject.org/xsa/advisory-462.html
Mailing List
http://www.openwall.com/lists/oss-security/2024/09/24/1
Patch
http://xenbits.xen.org/xsa/advisory-462.html
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